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FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
An alternative data pointer is available in the form of the PDATA register (SFR 0xBF), sometimes referred
to as USR2 ). It defines the high byte of a 16-bit address when reading or writing XDATA with the instruction
MOVX A,@Ri or MOVX @Ri,A.
Internal Data Memory Map and Access
The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data memory
address is always 1 byte wide. Table 8 shows the internal data memory map.
The Special Function Registers (SFR) occupy the upper 128 bytes. The SFR area of internal data memory
is available only by direct addressing . Indirect addressing of this area accesses the upper 128 bytes of
Internal RAM. The lower 128 bytes contain working registers and bit addressable memory. The lower 32
bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word ( PSW ) select
which bank is in use. The next 16 bytes form a block of bit addressable memory space at bit addresses
0x00-0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect addressing.
Table 8: Internal Data Memory Map
Address Range
Direct addressing
Indirect addressing
0x80
0x30
0x20
0x00
0xFF
0x7F
0x2F
0x1F
Special Function Registers (SFRs)
Byte addressable area
Bit addressable area
Register banks R0…R7
RAM
1.4.2
Special Function Registers (SFRs)
Only a few addresses in the SFR memory space are occupied, the others are not implemented. A read
access to unimplemented addresses will return undefined data, while a write access will have no effect.
SFRs specific to the 71M6531D/F and 71M6532D/F are shown in bold print on a gray field. The registers
at 0x80, 0x88, 0x90, etc., are bit addressable, all others are byte addressable. See the restrictions for the
Table 9: Special Function Register Map
Hex/
Bin
Bit
Addressable
X000
X001
X010
Byte Addressable
X011 X100 X101
X110
X111
Bin/
Hex
F8
F0
E8
E0
D8
D0
C8
C0
INTBITS
B
IFLAGS
A
WDCON
PSW
T2CON
IRCON
FF
F7
EF
E7
DF
D7
CF
C7
B8
B0
A8
A0
IEN1
P3
IEN0
P2
IP1
IP0
DIR2
S0RELH
FLSHCTL
S0RELL
DIR0
S1RELH
FL_BANK
PDATA
PGADR
BF
B7
AF
A7
98
S0CON
S0BUF
IEN2
S1CON
S1BUF
S1RELL
EEDATA
EECTRL
9F
90
P1
DIR1
DPS
ERASE
97
88
80
TCON
P0
TMOD
SP
TL0
DPL
TL1
DPH
TH0
DPL1
TH1
DPH1
CKCON
PCON
8F
87
Rev 2
21
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